Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 560 Preliminary © 2009-2012 Microchip Technology Inc.
TABLE 32-59: DCI MODULE (MULTI-CHANNEL, I
2
S MODES) TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
-40°C ≤ T
A ≤ +125°C for Extended
Param. Symbol Characteristic
(1)
Min. Typ.
(2)
Max. Units Conditions
CS10 T
CSCKL CSCK Input Low Time
(CSCK pin is an input)
TCY/2 + 20 — — ns —
CSCK Output Low Time
(3)
(CSCK pin is an output)
30 — — ns —
CS11 T
CSCKH CSCK Input High Time
(CSCK pin is an input)
TCY/2 + 20 — — ns —
CSCK Output High Time
(3)
(CSCK pin is an output)
30 — — ns —
CS20 TCSCKF CSCK Output Fall Time
(CSCK pin is an output)
— — — ns See parameter
DO32
CS21 T
CSCKR CSCK Output Rise Time
(CSCK pin is an output)
— — — ns See parameter
DO31
CS30 TCSDOF CSDO Data Output Fall Time — — — ns See parameter
DO32
CS31 TCSDOR CSDO Data Output Rise Time — — — ns See parameter
DO31
CS35 T
DV Clock Edge to CSDO Data Valid — — 10 ns —
CS36 TDIV Clock Edge to CSDO Tri-Stated 10 — 20 ns —
CS40 T
CSDI Setup Time of CSDI Data Input
to CSCK Edge (CSCK pin is
input or output)
20 — — ns —
CS41 THCSDI Hold Time of CSDI Data Input to
CSCK Edge (CSCK pin is input
or output)
20 — — ns —
CS50 TCOFSF COFS Fall Time
(COFS pin is output)
— — — ns See parameter
DO32
CS51 TCOFSR COFS Rise Time
(COFS pin is output)
— — — ns See parameter
DO31
CS55 T
SCOFS Setup Time of COFS Data Input
to CSCK Edge (COFS pin is
input)
20 — — ns —
CS56 THCOFS Hold Time of COFS Data Input to
CSCK Edge (COFS pin is input)
20 — — ns —
Note 1: These parameters are characterized but not tested in manufacturing.
2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
3: The minimum clock period for CSCK is 100 ns. Therefore, the clock generated in Master mode must not
violate this specification.