Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814 DS70616F-page 56 Preliminary © 2009-2012 Microchip Technology Inc.
SR
0042
OA OB SA SB OAB SAB DA DC IPL2 IPL1 IPL0 RA N OV Z C
0000
CORCON
0044
VAR
— US<1:0> EDT DL<2:0> SATA SATB SATDW ACCSAT IPL3 SFA RND IF 0020
MODCON
0046
XMODEN YMODEN
— — BWM<3:0> YWM<3:0> XWM<3:0>
0000
XMODSRT
0048
XMODSRT<15:1>
0
0000
XMODEND
004A
XMODEND<15:1> 1
0001
YMODSRT
004C
YMODSRT<15:1>
0
0000
YMODEND
004E
YMODEND<15:1> 1
0001
XBREV
0050
BREN XBREV<14:0>
0000
DISICNT
0052
— — DISICNT<13:0>
0000
TBLPAG
0054
— — — — — — — — TBLPAG<7:0>
0000
MSTRPR
0058
MSTRPR<15:0>
0000
TABLE 4-1: CPU CORE REGISTER MAP FOR dsPIC33EPXXX(GP/MC/MU)806/810/814 DEVICES ONLY (CONTINUED)
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.