Datasheet

© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 535
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
FIGURE 32-24: SPI2 MASTER MODE (HALF-DUPLEX, TRANSMIT ONLY CKE = 1) TIMING
CHARACTERISTICS
TABLE 32-42: SPI2 MASTER MODE (HALF-DUPLEX, TRANSMIT ONLY) TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C TA +85°C for Industrial
-40°C TA +125°C for Extended
Param. Symbol Characteristic
(1)
Min. Typ.
(2)
Max. Units Conditions
SP10 TscP Maximum SCK Frequency 15 MHz
See Note 3
SP20 TscF SCKx Output Fall Time ns See parameter DO32
and Note 4
SP21 TscR SCKx Output Rise Time ns See parameter DO31
and Note 4
SP30 TdoF SDOx Data Output Fall Time ns See parameter DO32
and Note 4
SP31 TdoR SDOx Data Output Rise Time ns See parameter DO31
and Note 4
SP35 TscH2doV,
TscL2doV
SDOx Data Output Valid after
SCKx Edge
—620ns
SP36 TdiV2scH,
TdiV2scL
SDOx Data Output Setup to
First SCKx Edge
30 ns
Note 1: These parameters are characterized, but are not tested in manufacturing.
2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated.
3: The minimum clock period for SCKx is 66.7 ns. Therefore, the clock generated in Master mode must not
violate this specification.
4: Assumes 50 pF load on all SPIx pins.
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SP10
SP21
SP20
SP35
SP20
SP21
MSb LSb
Bit 14 - - - - - -1
SP30, SP31
Note: Refer to Figure 32-1 for load conditions.
SP36