Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 500 Preliminary © 2009-2012 Microchip Technology Inc.
TABLE 32-7: DC CHARACTERISTICS: POWER-DOWN CURRENT (IPD)
DC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ + 85°C for Industrial
-40°C ≤ TA ≤ +125°C for Extended
Param. Typ.
(2)
Max. Units Conditions
Power-Down Current (I
PD)
(1)
DC60d 50 100 μA -40°C
3.3V Base Power-Down Current
(1,4)
DC60a 60 200 μA +25°C
DC60b 250 500 μA +85°C
DC60c 1600 3000 μA +125°C
DC61d 8 10 μA -40°C
3.3V Watchdog Timer Current: ΔI
WDT
(3)
DC61a 10 15 μA +25°C
DC61b 12 20 μA +85°C
DC61c 13 25 μA +125°C
Note 1: I
PD (Sleep) current is measured as follows:
• CPU core is off, oscillator is configured in EC mode and external clock active, OSC1 is driven with
external square wave from rail-to-rail (EC clock overshoot/undershoot < 250 mV required)
• CLKO is configured as an I/O input pin in the Configuration word
• External Secondary Oscillator (S
OSC) is disabled (i.e., SOSCO and SOSCI pins are configured as
digital I/O inputs)
• All I/O pins are configured as inputs and pulled to V
SS
•MCLR = VDD, WDT and FSCM are disabled, all peripheral modules are disabled (PMDx bits are all
ones)
• VREGS bit (RCON<8>) = 0 (i.e., core regulator is set to stand-by while the device is in Sleep mode)
• RTCC is disabled.
• The VREGSF bit (RCON<11>) = 0 (i.e., Flash regulator is set to stand-by while the device is in Sleep
mode)
• JTAG is disabled
2: Data in the “Typ” column is at 3.3V, +25ºC unless otherwise stated.
3: The Watchdog Timer Current is the additional current consumed when the WDT module is enabled. This
current should be added to the base I
PD current.
4: These currents are measured on the device containing the most memory in this family.