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© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 477
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
29.2 On-Chip Voltage Regulator
All of the dsPIC33EPXXX(GP/MC/MU)806/810/814
and PIC24EPXXX(GP/GU)810/814 devices power
their core digital logic at a nominal 1.8V. This can create
a conflict for designs that are required to operate at a
higher typical voltage, such as 3.3V. To simplify system
design, all devices in the dsPIC33EPXXX(GP/MC/
MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
family incorporate an on-chip regulator that allows the
device to run its core logic from V
DD.
The regulator provides power to the core from the other
V
DD pins. A low-ESR (less than 1 Ohms) capacitor
(such as tantalum or ceramic) must be connected to the
VCAP pin (Figure 29-1). This helps to maintain the sta-
bility of the regulator. The recommended value for the
filter capacitor is provided in Table 32-13 located in
Section 32.0 “Electrical Characteristics”.
FIGURE 29-1: CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
(1,2,3)
29.3 BOR: Brown-out Reset (BOR)
The Brown-out Reset module is based on an internal
voltage reference circuit that monitors the regulated
supply voltage V
CAP. The main purpose of the BOR
module is to generate a device Reset when a brown-
out condition occurs. Brown-out conditions are gener-
ally caused by glitches on the AC mains (for example,
missing portions of the AC cycle waveform due to bad
power transmission lines, or voltage sags due to exces-
sive current draw when a large inductive load is turned
on).
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>).
If an oscillator mode is selected, the BOR activates the
Oscillator Start-up Timer (OST). The system clock is
held until OST expires. If the PLL is used, the clock is
held until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) is applied
before the internal Reset is released. If TPWRT = 0 and
a crystal oscillator is being used, then a nominal delay
of TFSCM is applied. The total delay in this case is
TFSCM. Refer to parameter SY35 in Table 32-22 of
Section 32.0 “Electrical Characteristics” for specific
T
FSCM values.
The BOR Status bit (RCON<1>) is set to indicate that a
BOR has occurred. The BOR circuit, continues to oper-
ate while in Sleep or Idle modes and resets the device
should V
DD fall below the BOR threshold voltage.
Note: It is important for the low-ESR capacitor to
be placed as close as possible to the V
CAP
pin.