Datasheet

© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 291
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
16.0 HIGH-SPEED PWM MODULE
(dsPIC33EPXXX(MC/MU)8XX
DEVICES ONLY)
The dsPIC33EPXXX(MC/MU)806/810/814 devices
support a dedicated Pulse-Width Modulation (PWM)
module with up to 14 outputs.
The High-Speed PWM module consists of the following
major features:
• Two master time base modules with special event
triggers
• PWM module input clock prescaler
• Two synchronization inputs
• Two synchronization outputs
• Up to seven PWM generators
• Two PWM outputs per generator (PWMxH and
PWMxL)
• Individual period, duty cycle and phase shift for
each PWM output
• Period, duty cycle, phase shift and dead-time
resolution of 8.32 ns
• Immediate update mode for PWM period, duty
cycle and phase shift
• Independent fault and current-limit inputs for each
PWM
• Cycle by cycle and latched fault modes
• PWM time-base capture upon current limit
• Seven fault inputs and three comparator outputs
available for faults and current-limits
• Programmable A/D trigger with interrupt for each
PWM pair
• Complementary PWM outputs
• Push-Pull PWM outputs
• Redundant PWM outputs
• Edge-Aligned PWM mode
• Center-Aligned PWM mode
• Variable Phase PWM mode
• Multi-Phase PWM mode
• Fixed-Off Time PWM mode
• Current Limit PWM mode
• Current Reset PWM mode
• PWMxH and PWMxL output override control
• PWMxH and PWMxL output pin swapping
• Chopping mode (also known as Gated mode)
• Dead-time insertion
• Dead-time compensation
• Enhanced Leading-Edge Blanking (LEB)
• 8 mA PWM pin output drive
The High-Speed PWM module contains up to seven
PWM generators. Each PWM generator provides two
PWM outputs: PWMxH and PWMxL
. Two master time
base generators provide a synchronous signal as a
common time base to synchronize the various PWM
outputs. Each generator can operate independently or
in synchronization with either of the two master time
bases.
The individual PWM outputs are available on
the output pins of the device. The input Fault signals
and current-limit signals, when enabled, can monitor
and protect the system by placing the PWM outputs
into a known “safe” state.
Each PWM can generate a trigger to the ADC module
to sample the analog signal at a specific instance dur-
ing the PWM period. In addition, the High-Speed PWM
module also generates two Special Event Triggers to
the ADC module based on the two master time bases.
The High-Speed PWM module can synchronize itself
with an external signal or can act as a synchronizing
source to any external device. The SYNCI1 and
SYNCI2 pins are the input pins, which can synchronize
the High-Speed PWM module with an external signal.
The SYNCO1 and SYNCO2 pins are output pins that
provides a synchronous signal to an external device.
Figure 16-1 illustrates an architectural overview of the
High-Speed PWM module and its interconnection with
the CPU and other peripherals.
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXX(GP/MC/MU)806/
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive reference source.
To complement the information in this
data sheet, refer to Section 14. “High-
Speed PWM” (DS70645) of the
“dsPIC33E/PIC24E Family Reference
Manual”, which is available from the
Microchip web site
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
Note: Duty cycle, dead-time, phase shift and
frequency resolution is 16.64 ns in
Center-Aligned PWM mode.