Datasheet

© 2009-2012 Microchip Technology Inc. Preliminary DS70616F-page 287
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
15.2 Output Compare Registers
REGISTER 15-1: OCxCON1: OUTPUT COMPAREx CONTROL REGISTER 1
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — OCSIDL OCTSEL<2:0> ENFLTC ENFLTB
bit 15 bit 8
R/W-0 R/W-0 HCS R/W-0 HCS R/W-0 HCS
R/W-0 R/W-0 R/W-0 R/W-0
ENFLTA OCFLTC OCFLTB OCFLTA TRIGMODE OCM<2:0>
bit 7 bit 0
Legend: HCS = Hardware Clearable/Settable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0’
bit 13 OCSIDL: Stop Output Compare x in Idle Mode Control bit
1 = Output Compare x halts in CPU Idle mode
0 = Output Compare x continues to operate in CPU Idle mode
bit 12-10 OCTSEL<2:0>: Output Compare x Clock Select bits
111 = Peripheral clock (F
P)
110 = Reserved
101 = Reserved
100 = Clock source of T1CLK is the clock source of OCx (only the synchronous clock is supported)
011 = Clock source of T5CLK is the clock source of OCx
010 = Clock source of T4CLK is the clock source of OCx
001 = Clock source of T3CLK is the clock source of OCx
000 = Clock source of T2CLK is the clock source of OCx
bit 9 ENFLTC: Fault C Input Enable bit
1 = Output Compare Fault C input (OCFC) is enabled
0 = Output Compare Fault C input (OCFC) is disabled
bit 8 ENFLTB: Fault B Input Enable bit
1 = Output Compare Fault B input (OCFB) is enabled
0 = Output Compare Fault B input (OCFB) is disabled
bit 7 ENFLTA: Fault A Input Enable bit
1 = Output Compare Fault A input (OCFA) is enabled
0 = Output Compare Fault A input (OCFA) is disabled
bit 6 OCFLTC: PWM Fault C Condition Status bit
1 = PWM Fault C condition on OCFC pin has occurred
0 = No PWM Fault C condition on OCFC pin has occurred
bit 5 OCFLTB: PWM Fault B Condition Status bit
1 = PWM Fault B condition on OCFB pin has occurred
0 = No PWM Fault B condition on OCFB pin has occurred
bit 4 OCFLTA: PWM Fault A Condition Status bit
1 = PWM Fault A condition on OCFA pin has occurred
0 = No PWM Fault A condition on OCFA pin has occurred
bit 3 TRIGMODE: Trigger Status Mode Select bit
1 = TRIGSTAT (OCxCON2<6>) is cleared when OCxRS = OCxTMR or in software
0 = TRIGSTAT is cleared only by software
Note 1: OCxR and OCxRS are double-buffered in PWM mode only.