Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616F-page 234 Preliminary © 2009-2012 Microchip Technology Inc.
REGISTER 11-18: RPINR17: PERIPHERAL PIN SELECT INPUT REGISTER 17
(dsPIC33EPXXXMU806/810/814 DEVICES ONLY)
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— HOME2R<6:0>
(1)
bit 15 bit 8
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— INDX2R<6:0>
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-8 HOME2R<6:0>: Assign QEI2 HOME2 (HOME2) to the Corresponding RPn/RPIn Pin bits
(1)
(see Tabl e 11 - 2 for input pin selection numbers)
1111111 = Input tied to RP127
.
.
.
0000001 = Input tied to CMP1
0000000 = Input tied to V
SS
bit 7 Unimplemented: Read as ‘0’
bit 6-0 INDX2R<6:0>: Assign QEI2 INDEX (INDX2) to the Corresponding RPn/RPIn Pin bits
(1)
(see Tabl e 11 - 2 for input pin selection numbers)
1111111 = Input tied to RP127
.
.
.
0000001 = Input tied to CMP1
0000000 = Input tied to V
SS
Note 1: These bits are available on dsPIC33EPXXX(MC/MU)806/810/814 devices only.