Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814 DS70616F-page 106 Preliminary © 2009-2012 Microchip Technology Inc.
TABLE 4-44: REFERENCE CLOCK REGISTER MAP
TABLE 4-45: NVM REGISTER MAP
TABLE 4-46: SYSTEM CONTROL REGISTER MAP
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
REFOCON
074E ROON — ROSSLP ROSEL RODIV<3:0> — — — — — — — —
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
NVMCON 0728 WR WREN WRERR NVMSIDL
— — — — — — — — NVMOP<3:0>
0000
NVMADR 072A NVMADR<15:0>
0000
NVMADRU 072C
— — — — — — — — NVMADR<23:16>
0000
NVMKEY 072E
— — — — — — — — NVMKEY<7:0>
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
RCON 0740 TRAPR IOPUWR
— —VREGSF — CM VREGS EXTR SWR SWDTEN WDTO SLEEP IDLE BOR POR Note 1
OSCCON 0742 — COSC<2:0> — NOSC<2:0> CLKLOCK IOLOCK LOCK —CF— LPOSCEN OSWEN Note 2
CLKDIV 0744 ROI DOZE<2:0> DOZEN FRCDIV<2:0> PLLPOST<1:0> — PLLPRE<4:0>
3040
PLLFBD 0746
— — — — — — — PLLDIV<8:0>
0030
OSCTUN 0748
— — — — — — — — — — TUN<5:0>
0000
ACLKCON3 0758 ENAPLL
— SELACLK AOSCMD<1:0> ASRCSEL FRCSEL — APLLPOST2<2:0> — — APLLPRE<2:0>
0000
ACLKDIV3 075A
— — — — — — — — — — — — — APLLDIV<2:0>
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: RCON register reset values dependent on type of reset.
2: OSCCON register reset values dependent on configuration fuses, and by type of reset.