Datasheet

© 2009-2011 Microchip Technology Inc. DS61156G-page 37
PIC32MX5XX/6XX/7XX
SS1 — 69 E10 I/O ST SPI1 slave synchronization or frame pulse I/O
SCK3 49 48 K9 I/O ST Synchronous serial clock input/output for SPI3
SDI3 50 52 K11 I ST SPI3 data in
SDO3 51 53 J10 O — SPI3 data out
SS3
43 47 L9 I/O ST SPI3 slave synchronization or frame pulse I/O
SCK2 4 10 E3 I/O ST Synchronous serial clock input/output for SPI2
SDI2 5 11 F4 I ST SPI2 data in
SDO2 6 12 F2 O — SPI2 data out
SS2
8 14 F3 I/O ST SPI2 slave synchronization or frame pulse I/O
SCK4 29 39 L6 I/O ST Synchronous serial clock input/output for SPI4
SDI4 31 49 L10 I ST SPI4 data in
SDO4 32 50 L11 O — SPI4 data out
SS4
21 40 K6 I/O ST SPI4 slave synchronization or frame pulse I/O
SCL1 44 66 E11 I/O ST Synchronous serial clock input/output for I2C1
SDA1 43 67 E8 I/O ST Synchronous serial data input/output for I2C1
SCL3 51 53 J10 I/O ST Synchronous serial clock input/output for I2C3
SDA3 50 52 K11 I/O ST Synchronous serial data input/output for I2C3
SCL2 — 58 H11 I/O ST Synchronous serial clock input/output for I2C2
SDA2 — 59 G10 I/O ST Synchronous serial data input/output for I2C2
SCL4 6 12 F2 I/O ST Synchronous serial clock input/output for I2C4
SDA4 5 11 F4 I/O ST Synchronous serial data input/output for I2C4
SCL5 32 50 L11 I/O ST Synchronous serial clock input/output for I2C5
SDA5 31 49 L10 I/O ST Synchronous serial data input/output for I2C5
TMS 23 17 G3 I ST JTAG Test mode select pin
TCK 27 38 J6 I ST JTAG test clock input pin
TDI 28 60 G11 I ST JTAG test data input pin
TDO 24 61 G9 O — JTAG test data output pin
RTCC 42 68 E9 O — Real-Time Clock alarm output
CV
REF- 15 28 L2 I Analog Comparator Voltage Reference (low)
CVREF+ 16 29 K3 I Analog Comparator Voltage Reference (high)
CV
REFOUT 23 34 L5 O Analog Comparator Voltage Reference output
C1IN- 12 21 H2 I Analog Comparator 1 negative input
C1IN+ 11 20 H1 I Analog Comparator 1 positive input
C1OUT 21 32 K4 O — Comparator 1 output
C2IN- 14 23 J2 I Analog Comparator 2 negative input
C2IN+ 13 22 J1 I Analog Comparator 2 positive input
C2OUT 22 33 L4 O — Comparator 2 output
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
(1)
Pin
Type
Buffer
Type
Description
64-Pin
QFN/TQFP
100-Pin
TQFP
121-Pin
XBGA
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
TTL = TTL input buffer
Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability.
2: See Section 24.0 “Ethernet Controller” for more information.