Datasheet

PIC32MX5XX/6XX/7XX
DS61156G-page 36 © 2009-2011 Microchip Technology Inc.
RG0 — 90 A5 I/O ST PORTG is a bidirectional I/O port
RG1 — 89 E6 I/O ST
RG6 4 10 E3 I/O ST
RG7 5 11 F4 I/O ST
RG8 6 12 F2 I/O ST
RG9 8 14 F3 I/O ST
RG12 — 96 C3 I/O ST
RG13 — 97 A3 I/O ST
RG14 — 95 C4 I/O ST
RG15 — 1 B2 I/O ST
RG2 37 57 H10 I ST PORTG input pins
RG3 36 56 J11 I ST
T1CK 48 74 B11 I ST Timer1 external clock input
T2CK — 6 D1 I ST Timer2 external clock input
T3CK — 7 E4 I ST Timer3 external clock input
T4CK — 8 E2 I ST Timer4 external clock input
T5CK — 9 E1 I ST Timer5 external clock input
U1CTS
43 47 L9 I ST UART1 clear to send
U1RTS
49 48 K9 O — UART1 ready to send
U1RX
50 52 K11
I ST UART1 receive
U1TX
51 53 J10
O — UART1 transmit
U3CTS
8 14 F3 I ST UART3 clear to send
U3RTS
4 10 E3 O — UART3 ready to send
U3RX
511F4
I ST UART3 receive
U3TX
612F2
O — UART3 transmit
U2CTS 21 40 K6 I ST UART2 clear to send
U2RTS
29 39 L6 O — UART2 ready to send
U2RX
31 49 L10
I ST UART2 receive
U2TX
32 50 L11
O — UART2 transmit
U4RX
43 47 L9
I ST UART4 receive
U4TX
49 48 K9
O — UART4 transmit
U6RX
814F3
I ST UART6 receive
U6TX
410E3
O — UART6 transmit
U5RX
21 40 K6
I ST UART5 receive
U5TX
29 39 L6
O — UART5 transmit
SCK1 — 70 D11 I/O ST Synchronous serial clock input/output for SPI1
SDI1 — 9 E1 I ST SPI1 data in
SDO1 — 72 D9 O — SPI1 data out
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
(1)
Pin
Type
Buffer
Type
Description
64-Pin
QFN/TQFP
100-Pin
TQFP
121-Pin
XBGA
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
TTL = TTL input buffer
Note 1: Pin numbers are provided for reference only. See the “Pin Diagrams” section for device pin availability.
2: See Section 24.0 “Ethernet Controller” for more information.