Datasheet

© 2009-2011 Microchip Technology Inc. DS61156G-page 171
PIC32MX5XX/6XX/7XX
REGISTER 28-4: DEVCFG3: DEVICE CONFIGURATION WORD 3
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/P R/P r-1 r-1 r-1 R/P R/P R/P
FVBUSONIO FUSBIDIO — — — FCANIO
(1)
FETHIO
(2)
FMIIEN
(2)
23:16
r-1 r-1 r-1 r-1 r-1 R/P R/P R/P
— — — — — FSRSSEL<2:0>
15:8
R/P R/P R/P R/P R/P R/P R/P R/P
USERID<15:8>
7:0
R/P R/P R/P R/P R/P R/P R/P R/P
USERID<7:0>
Legend:
R = Readable bit W = Writable bit P = Programmable bit r = Reserved bit
U = Unimplemented bit ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31
FVBUSONIO: USB VBUS_ON Selection bit
1 = VBUSON pin is controlled by the USB module
0 = VBUSON pin is controlled by the port function
bit 30
FUSBIDIO: USB USBID Selection bit
1 = USBID pin is controlled by the USB module
0 = USBID pin is controlled by the port function
bit 29-27
Reserved: Write ‘1’
bit 26
FCANIO: CAN I/O Pin Selection bit
(1)
1 = Default CAN I/O Pins
0 = Alternate CAN I/O Pins
bit 25
FETHIO: Ethernet I/O Pin Selection bit
(2)
1 = Default Ethernet I/O Pins
0 = Alternate Ethernet I/O Pins
bit 24
FMIIEN: Ethernet MII Enable bit
(2)
1 = MII is enabled
0 = RMII is enabled
bit 23-19
Reserved: Write ‘1’
bit 18-16
FSRSSEL<2:0>: SRS Select bits
111 = Assign Interrupt Priority 7 to a shadow register set
110 = Assign Interrupt Priority 6 to a shadow register set
•
•
•
001 = Assign Interrupt Priority 1 to a shadow register set
000 = All interrupt priorities are assigned to a shadow register set
bit 15-0
USERID<15:0>: This is a 16-bit value that is user-defined and is readable via ICSP™ and JTAG
Note 1: This bit is Reserved and reads ‘1’ on PIC32MX664/675/695 devices.
2: This bit is Reserved and reads ‘1’ on PIC32MX534/564/575 devices.