Information
Pinouts and pin description STM32F405xx, STM32F407xx
64/185 DocID022152 Rev 4
Port E
PE0 TIM4_ETR FSMC_NBL0 DCMI_D2 EVENTOUT
PE1 FSMC_NBL1 DCMI_D3 EVENTOUT
PE2
TRACECL
K
ETH _MII_TXD3 FSMC_A23 EVENTOUT
PE3 TRACED0 FSMC_A19 EVENTOUT
PE4 TRACED1 FSMC_A20 DCMI_D4 EVENTOUT
PE5 TRACED2 TIM9_CH1 FSMC_A21 DCMI_D6 EVENTOUT
PE6 TRACED3 TIM9_CH2 FSMC_A22 DCMI_D7 EVENTOUT
PE7 TIM1_ETR FSMC_D4 EVENTOUT
PE8 TIM1_CH1N FSMC_D5 EVENTOUT
PE9 TIM1_CH1 FSMC_D6 EVENTOUT
PE10 TIM1_CH2N FSMC_D7 EVENTOUT
PE11 TIM1_CH2 FSMC_D8 EVENTOUT
PE12 TIM1_CH3N FSMC_D9 EVENTOUT
PE13 TIM1_CH3 FSMC_D10 EVENTOUT
PE14 TIM1_CH4 FSMC_D11 EVENTOUT
PE15 TIM1_BKIN FSMC_D12 EVENTOUT
Table 9. Alternate function mapping (continued)
Port
AF0 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13
AF14 AF15
SYS TIM1/2 TIM3/4/5
TIM8/9/10/1
1
I2C1/2/3
SPI1/SPI2/
I2S2/I2S2ext
SPI3/I2Sext/
I2S3
USART1/2/3/
I2S3ext
UART4/5/
USART6
CAN1/
CAN2/
TIM12/13/14
OTG_FS/
OTG_HS
ETH
FSMC/SDIO/
OTG_FS
DCMI