Information

Electrical characteristics STM32F405xx, STM32F407xx
140/185 DocID022152 Rev 4
Figure 57. Asynchronous multiplexed PSRAM/NOR read waveforms
t
h(A_NWE)
Address hold time after FSMC_NWE high T
HCLK
– 2 - ns
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid - 1.5 ns
t
h(BL_NWE)
FSMC_BL hold time after FSMC_NWE high T
HCLK
– 1 - ns
t
v(Data_NE)
Data to FSMC_NEx low to Data valid - T
HCLK
+3 ns
t
h(Data_NWE)
Data hold time after FSMC_NWE high T
HCLK
–1 - ns
t
v(NADV_NE)
FSMC_NEx low to FSMC_NADV low - 2 ns
t
w(NADV)
FSMC_NADV low time - T
HCLK
+0.5 ns
1. C
L
= 30 pF.
2. Based on characterization, not tested in production.
Table 77. Asynchronous multiplexed PSRAM/NOR read timings
(1)(2)
Symbol Parameter Min Max Unit
t
w(NE)
FSMC_NE low time 3T
HCLK
–1 3T
HCLK
+1 ns
t
v(NOE_NE)
FSMC_NEx low to FSMC_NOE low 2T
HCLK
–0.5 2T
HCLK
+0.5 ns
t
w(NOE)
FSMC_NOE low time T
HCLK
–1 T
HCLK
+1 ns
t
h(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time 0 - ns
t
v(A_NE)
FSMC_NEx low to FSMC_A valid - 3 ns
Table 76. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
(1)(2)
NBL
Data
FSMC_NBL[1:0]
FSMC_
AD[15:0]
t
v(BL_NE)
t
h(Data_NE)
Address
FSMC_A[25:16]
t
v(A_NE)
FSMC_NWE
t
v(A_NE)
ai14892b
Address
FSMC_NADV
t
v(NADV_NE)
t
w(NADV)
t
su(Data_NE)
t
h(AD_NADV)
FSMC_NE
FSMC_NOE
t
w(NE)
t
w(NOE)
t
v(NOE_NE)
t
h(NE_NOE)
t
h(A_NOE)
t
h(BL_NOE)
t
su(Data_NOE)
t
h(Data_NOE)