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Electrical characteristics STM32F405xx, STM32F407xx
118/185 DocID022152 Rev 4
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 55 for SPI are derived from tests
performed under the ambient temperature, f
PCLKx
frequency and V
DD
supply voltage
conditions summarized in Table 14 with the following configuration:
• Output speed is set to OSPEEDRy[1:0] = 10
• Capacitive load C = 30 pF
• Measurement points are done at CMOS levels: 0.5 V
DD
Refer to Section 5.3.16: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO).
Table 54. SCL frequency (f
PCLK1
= 42 MHz.,V
DD
= 3.3 V)
(1)(2)
1. R
P
= External pull-up resistance, f
SCL
= I
2
C speed,
2. For speeds around 200 kHz, the tolerance on the achieved speed is of ±5%. For other speed ranges, the
tolerance on the achieved speed ±2%. These variations depend on the accuracy of the external
components used to design the application.
f
SCL
(kHz)
I2C_CCR value
R
P
= 4.7 kΩ
400 0x8019
300 0x8021
200 0x8032
100 0x0096
50 0x012C
20 0x02EE
Table 55. SPI dynamic characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
f
SCK
SPI clock frequency
Master mode, SPI1,
2.7V < V
DD
< 3.6V
--
42
MHz
Slave mode, SPI1,
2.7V < V
DD
< 3.6V
42
1/t
c(SCK)
Master mode, SPI1/2/3,
1.7V < V
DD
< 3.6V
--
21
Slave mode, SPI1/2/3,
1.7V < V
DD
< 3.6V
21
Duty(SCK)
Duty cycle of SPI clock
frequency
Slave mode 30 50 70 %