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STM32F405xx, STM32F407xx Electrical characteristics
Figure 37. I/O AC characteristics definition
5.3.17 NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
PU
(see Table 47).
Unless otherwise specified, the parameters given in Table 50 are derived from tests
performed under the ambient temperature and V
DD
supply voltage conditions summarized
in Table 14 .
11
F
max(IO)ou
t
Maximum frequency
(4)
C
L
= 30 pF, V
DD >
2.70 V - - 100
(5)
MHz
C
L
= 30 pF, V
DD >
1.8 V - - 50
(5)
C
L
= 10 pF, V
DD >
2.70 V - - 200
(5)
C
L
= 10 pF, V
DD >
1.8 V - - TBD
t
f(IO)out
Output high to low level fall
time
C
L
= 20 pF,
2.4 < V
DD
< 2.7 V
--TBD
ns
C
L
= 10 pF, V
DD
> 2.7 V - - TBD
t
r(IO)out
Output low to high level rise
time
C
L
= 20 pF,
2.4 < V
DD
< 2.7 V
--TBD
C
L
= 10 pF, V
DD
> 2.7 V - - TBD
-t
EXTIpw
Pulse width of external
signals detected by the EXTI
controller
10 - - ns
1. Based on characterization data, not tested in production.
2. The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the STM32F20/21xxx reference manual for a
description of the GPIOx_SPEEDR GPIO port output speed register.
3. TBD stands for “to be defined”.
4. The maximum frequency is defined in Figure 37.
5. For maximum frequencies above 50 MHz, the compensation cell should be used.
Table 49. I/O AC characteristics
(1)(2)(3)
(continued)
OSPEEDRy
[1:0] bit
value
(1)
Symbol Parameter Conditions Min Typ Max Unit
ai14131
10%
90%
50%
t
r(IO)out
OUTPUT
EXTERNAL
ON 50pF
Maximum frequency is achieved if (t
r
+ t
f
) ≤ 2/3)T and if the duty cycle is (45-55%)
10%
50%
90%
when loaded by 50pF
T
t
r(IO)out