Information

Electrical characteristics STM32F405xx, STM32F407xx
108/185 DocID022152 Rev 4
5.3.14 Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test
conforms to the JESD22-A114/C101 standard.
Static latchup
Two complementary static tests are required on six parts to assess the latchup
performance:
• A supply overvoltage is applied to each power supply pin
• A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latchup standard.
Table 43. EMI characteristics
Symbol Parameter Conditions
Monitored
frequency band
Max vs.
[f
HSE
/f
CPU
]
Unit
25/168 MHz
S
EMI
Peak level
V
DD
= 3.3 V, T
A
= 25 °C, LQFP176
package, conforming to SAE J1752/3
EEMBC, code running from Flash with
ART accelerator enabled
0.1 to 30 MHz 32
dBµV30 to 130 MHz 25
130 MHz to 1GHz 29
SAE EMI Level 4 -
V
DD
= 3.3 V, T
A
= 25 °C, LQFP176
package, conforming to SAE J1752/3
EEMBC, code running from Flash with
ART accelerator and PLL spread
spectrum enabled
0.1 to 30 MHz 19
dBµV30 to 130 MHz 16
130 MHz to 1GHz 18
SAE EMI level 3.5 -
Table 44. ESD absolute maximum ratings
Symbol Ratings Conditions Class
Maximum
value
(1)
Unit
V
ESD(HBM)
Electrostatic discharge
voltage (human body
model)
T
A
= +25 °C conforming to JESD22-A114 2 2000
(2)
V
V
ESD(CDM)
Electrostatic discharge
voltage (charge device
model)
T
A
= +25 °C conforming to JESD22-C101 II 500
1. Based on characterization results, not tested in production.
2. On V
BAT
pin, V
ESD(HBM)
is limited to 1000 V.