Information
DocID15818 Rev 11 43/178
STM32F20xxx Pinouts and pin description
177
Figure 15. STM32F20x UFBGA176 ballout
1. RFU means “reserved for future use”. This pin can be tied to V
DD
,V
SS
or left unconnected.
2. The above figure shows the package top view.
1 2 3 9 10 11 12 13 14 15
A PE3 PE2 PE1 PE0 PB8 PB5 PG14 PG13 PB4 PB3 PD7 PC12 PA15 PA14 PA13
B PE4 PE5 PE6 PB9 PB7 PB6 PG15PG12PG11PG10 PD6 PD0 PC11PC10PA12
CVBATPI7PI6PI5
RFU
VDD
VDD VDD VDD PG9 PD5 PD1 PI3 PI2 PA11
D
PC13-
TAMP1
PI8-
TAMP2
PI9 PI4 BOOT0 VSS VSS VSS PD4 PD3 PD2 PH15 PI1 PA10
E
PC14-
OSC32_IN
PF0 PI10 PI11 PH13 PH14 PI0 PA9
F
PC15-
OSC32_OUT
VSS VDD PH2 VSS VSS VSS VSS VSS VSS VCAP_2 PC9 PA8
G
PH0-
OSC_IN
VSS VDD PH3 VSS VSS VSS VSS VSS VSS VDD PC8 PC7
H
PH1-
OSC_OUT
PF2 PF1 PH4 VSS VSS VSS VSS VSS VSS VDD PG8 PC6
J NRST PF3 PF4 PH5 VSS VSS VSS VSS VSS VDD VDD PG7 PG6
K PF7 PF6 PF5 VDD VSS VSS VSS VSS VSS PH12 PG5 PG4 PG3
L PF10 PF9 PF8
REGOFF
PH11 PH10 PD15 PG2
M VSSA PC0 PC1 PC2 PC3 PB2 PG1 VSS VSS VCAP_1 PH6 PH8 PH9 PD14 PD13
NVREF-PA1
PA0-
WKUP
PA4 PC4 PF13 PG0 VDD VDD VDD PE13 PH7 PD12 PD11 PD10
P VREF+ PA2 PA6 PA5 PC5 PF12 PF15 PE8 PE9 PE11 PE14 PB12 PB13 PD9 PD8
R VDDA PA3 PA7 PB1 PB0 PF11 PF14 PE7 PE10 PE12 PE15 PB10 PB11 PB14 PB15
ai17293c
VSS
435678
Table 7. Legend/abbreviations used in the pinout table
Name Abbreviation Definition
Pin name
Unless otherwise specified in brackets below the pin name, the pin function during and after
reset is the same as the actual pin name
Pin type
S Supply pin
I Input only pin
I/O Input/ output pin
I/O structure
FT 5 V tolerant I/O
TTa 3.3 V tolerant I/O
B Dedicated BOOT0 pin
NRST Bidirectional reset pin with embedded weak pull-up resistor
Notes Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset
Alternate
functions
Functions selected through GPIOx_AFR registers
Additional
functions
Functions directly selected/enabled through peripheral registers