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Electrical characteristics STM32F105xx, STM32F107xx
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5.3.6 External clock source characteristics
High-speed external user clock generated from an external source
The characteristics given in Table 20 result from tests performed using an high-speed
external clock source, and under ambient temperature and supply voltage conditions
summarized in Table 9.
Low-speed external user clock generated from an external source
The characteristics given in Table 21 result from tests performed using an low-speed
external clock source, and under ambient temperature and supply voltage conditions
summarized in Table 9.
Table 20. High-speed external user clock characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
HSE_ext
External user clock source
frequency
(1)
-
1850MHz
V
HSEH
OSC_IN input pin high level voltage 0.7V
DD
- V
DD
V
V
HSEL
OSC_IN input pin low level voltage V
SS
- 0.3V
DD
t
w(HSE)
t
w(HSE)
OSC_IN high or low time
(1)
1. Guaranteed by design, not tested in production.
5 - -
ns
t
r(HSE)
t
f(HSE)
OSC_IN rise or fall time
(1)
- - 20
C
in(HSE)
OSC_IN input capacitance
(1)
- - 5 - pF
DuCy
(HSE)
Duty cycle - 45 - 55 %
I
L
OSC_IN Input leakage current V
SS
V
IN
V
DD
- - ±1 µA
Table 21. Low-speed external user clock characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
LSE_ext
User External clock source
frequency
(1)
1. Guaranteed by design, not tested in production.
-
32.768 1000 kHz
V
LSEH
OSC32_IN input pin high level
voltage
0.7V
DD
- V
DD
V
V
LSEL
OSC32_IN input pin low level
voltage
V
SS
- 0.3V
DD
t
w(LSE)
t
w(LSE)
OSC32_IN high or low time
(1)
450 - -
ns
t
r(LSE)
t
f(LSE)
OSC32_IN rise or fall time
(1)
- - 50
C
in(LSE)
OSC32_IN input capacitance
(1)
- - 5 pF
DuCy
(LSE)
Duty cycle - 30 - 70 %
I
L
OSC32_IN Input leakage current V
SS
V
IN
V
DD
- - ±1 µA