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DocID15274 Rev 7 31/104

STM32F105xx, STM32F107xx Pinouts and pin description

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1. I = input, O = output, S = supply, HiZ = high impedance.

2. FT = 5 V tolerant. All I/Os are V

capable.

3. Function availability depends on the chosen device.

4. If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should

be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).

5. PC13, PC14 and PC15 are supplied through the power switch, and so their use in output mode is limited: they can be used

only in output 2 MHz mode with a maximum load of 30 pF and only one pin can be put in output mode at a time.

6. Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even

after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the

Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the

STMicroelectronics website: www.st.com.

7. This alternate function can be remapped by software to some other port pins (if available on the used package). For more

details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, available

from the STMicroelectronics website: www.st.com.

8. SPI2/I2S2 and I2C2 are not available when the Ethernet is being used.

9. For the LQFP64 package, the pins number 5 and 6 are configured as OSC_IN/OSC_OUT after reset, however the

functionality of PD0 and PD1 can be remapped by software on these pins. For the LQFP100 and BGA100 packages, PD0

and PD1 are available by default, so there is no need for remapping. For more details, refer to Alternate function I/O and

debug configuration section in the STM32F10xxx reference manual.