Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 89 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
9.12 Receiver configuration registers
9.12.1 RxSofD
9.12.2 RxCtrl
Table 147. RxSofD register (address 34h)
Bit 7 6 5 4 3 2 1 0
Symbol RFU SOF_En SOFDetected RFU SubC_En SubC_Detected SubC_Present
Access
rights
- r/w dy - r/w dy r
Table 148. RxSofD bits
Bit Symbol Description
7 to 6 RFU -
5 SOF_En If set and a SOF is detected an RxSOFIrq is raised.
4 SOF_Detected Shows that a SOF is or was detected. Can be cleared by SW.
3RFU -
2 SubC_En If set and a subcarrier is detected an RxSOFIrq is raised.
1 SubC_Detected Shows that a subcarrier is or was detected. Can be cleared by SW.
0 SubC_Present Shows that a subcarrier is currently detected.
Table 149. RxCtrl register (address 35h)
Bit 7 6 5 4 3 2 1 0
Symbol RxAllowBits RxMultiple RxEOFType EGT_Check EMD_Sup Baudrate
Access
rights
r/w r/w r/w r/w r/w r/w
Table 150. RxCtrl bits
Bit Symbol Description
7 RxAllowBits If set, data is written into FIFO even if CRC is enabled, and no
complete byte has been received.
6 RxMultiple If set, RxMultiple is activated and the receiver will not terminate
automatically (refer Section 8.10.3.5 “
Receive command”).
If set to logic 1, at the end of a received data stream an error byte is
added to the FIFO. The error byte is a copy of the Error register.
5 RxEOFType 0: EOF as defined in the RxEOFSymbolReg is expected.
1: ISO/IEC14443B EOF is expected.
Note: Clearing this bit to 0 and clearing bit 0 and bit 1 in the
RxEOFSymbolReg disables the EOF check.