Product data

Product data sheet

COMPANY PUBLIC

Rev. 3.3 — 4 February 2014

227433 58 of 120

NXP Semiconductors

MFRC631

High performance ISO/IEC 14443 A/B reader solution

3Dh PLL_Ctrl IntegerN PLL control register, for microcontroller clock output adjustment

3Eh PLL_DivOut IntegerN PLL control register, for microcontroller clock output adjustment

3Fh LPCD_QMin Low-power card detection Q channel minimum threshold

40h LPCD_QMax Low-power card detection Q channel maximum threshold

41h LPCD_IMin Low-power card detection I channel minimum threshold

42h LPCD_I_Result Low-power card detection I channel result register

43h LPCD_Q_Result Low-power card detection Q channel result register

44h PadEn PIN enable register

45h PadOut PIN out register

46h PadIn PIN in register

47h SigOut Enables and controls the SIGOUT Pin

48h-5Fh RFU -

7Fh Version Version and subversion register

Table 40. MFRC631 registers overview

…continued

Address Register name Function