Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 50 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
8.10 Command set
8.10.1 General
The behavior is determined by a state machine capable to perform a certain set of
commands. By writing the according command-code to register Command the command
is executed.
Arguments and/or data necessary to process a command, are exchanged via the FIFO
buffer.
• A data transmission of the TxEncoder can be started by a command. When started,
the communication is executed as defined in the TxFrameCon register. Therefore a
communication frame can consist of a start-symbol, a data-stream, and followed by
an end-symbol.
• Each command that needs a certain number of arguments will start processing only
when it has received the correct number of arguments via the FIFO buffer.
• The FIFO buffer is not cleared automatically at command start. Therefore, it is
recommended to write the command arguments and/or the data bytes into the FIFO
buffer and start the command afterwards.
• Each command may be interrupted by the host by writing a new command code into
register Command e.g.: the Idle-Command.
8.10.2 Command set overview
Table 36. Command set
Command No. Parameter (bytes) Short description
Idle 00h - no action, cancels current command execution
LPCD 01h - low-power card detection
LoadKey 02h (keybyte1),(keybyte2), (keybyte3),
(keybyte4), (keybyte5),(keybyte6);
reads a MIFARE key (size of 6 bytes) from FIFO buffer
ant puts it into Key buffer
MFAuthent 03h 60h or 61h, (block address), (card
serial number byte0),(card serial
number byte1), (card serial number
byte2),(card serial number byte3);
performs the MIFARE standard authentication in
MIFARE read/write mode only
Receive 05h - activates the receive circuit
Transmit 06h - transmits data from the FIFO buffer
Transceive 07h - transmits data from the FIFO buffer and automatically
activates the receiver after transmission finished
WriteE2 08h addressL, addressH, data; gets one byte from FIFO buffer and writes it to the
internal EEPROM, valid address range are the
addresses of the MIFARE Key area
WriteE2Page 09h (page Address), data0, [data1
..data63];
gets up to 64 bytes (one EEPROM page) from the FIFO
buffer and writes it to the EEPROM, valid page address
range are the pages of the MIFARE Key Area
ReadE2 0Ah addressL, address H, length; reads data from the EEPROM and copies it into the
FIFO buffer, valid address range are the addresses of
the MIFARE Key area
LoadReg 0Ch (EEPROM addressL), (EEPROM
addressH), RegAdr, (number of
Register to be copied);
reads data from the internal EEPROM and initializes the
MFRC631 registers. EEPROM address needs to be
within EEPROM sector 2