Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 4 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
6. Block diagram
The analog interface handles the modulation and demodulation of the antenna signals for
the contactless interface.
The contactless UART manages the protocol dependency of the contactless interface
settings managed by the host.
The FIFO buffer ensures fast and convenient data transfer between host and the
contactless UART.
The register bank contains the settings for the analog and digital functionality.
7. Pinning information
Fig 1. Simplified block diagram of the MFRC631
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HOST
ANTENNA
FIFO
BUFFER
ANALOG
INTERFACE
CONTACTLESS
UART
SERIAL UART
SPI
I
2
C-BUS
REGISTER BANK
(1) Pin 33 VSS - heatsink connection
Fig 2. Pinning configuration HVQFN32 (SOT617-1)
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33 VSS
Transparent top view
TX1
DVDD
VDD
TVDD
SIGOUT XTAL1
SIGIN XTAL2
TCK PDOWN
TMS CLKOUT
TDI SCL
TDO SDA
AVDD
AUX1 AUX2
RXP
RXN
VMID
TX2
TVSS
IRQ IF3 IF2 IF1 IF0 IFSEL1 IFSEL0 PVDD
8 17
7 18
6 19
5 20
4 21
3 22
2 23
1 24
9
10
11
12 13 14 15 16
32 31 30 29 28 27 26 25
terminal 1
index area