Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 33 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
The registers Section 9.8 and Section 9.10 control the data rate, the framing during
transmission and the setting of the antenna driver to support the requirements at the
different specified modes and transfer speeds.
Register TXamp and the bits for set_residual_carrier define the modulation index:
Table 20. Settings for TX1 and TX2
TxClkMode
(binary)
Tx1 and TX2 output Remarks
000 High impedance -
001 0 output pulled to 0 in any case
010 1 output pulled to 1 in any case
110 RF high side push open drain, only high side (push) MOS supplied
with clock, clock parity defined by invtx; low side
MOS is off
101 RF low side pull open drain, only low side (pull) MOS supplied
with clock, clock parity defined by invtx; high
side MOS is off
111 13.56 MHz clock derived
from 27.12 MHz quartz
divided by 2
push/pull Operation, clock polarity defined by
invtx; setting for 10% modulation
Table 21. Setting residual carrier and modulation index by TXamp.set_residual_carrier
set_residual_carrier (decimal) residual carrier [%] modulation index [%]
0990.5
1981.0
2962.0
3943.1
4914.7
5895.8
6877.0
7867.5
8858.1
9848.7
10 83 9.3
11 82 9.9
12 81 10.5
13 80 11.1
14 79 11.7
15 78 12.4
16 77 13.0
17 76 13.6
18 75 14.3
19 74 14.9
20 72 16.3
21 70 17.6
22 68 19.0