Product data

MFRC631 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 4 February 2014
227433 102 of 120
NXP Semiconductors
MFRC631
High performance ISO/IEC 14443 A/B reader solution
[1] I
pd
is the total current for all supplies.
[2] I
DD(PVDD)
depends on the overall load at the digital pins.
[3] I
DD(TVDD)
depends on V
DD(TVDD)
and the external circuit connected to pins TX1 and TX2.
[4] During typical circuit operation, the overall current is below 100 mA.
[5] Typical value using a complementary driver configuration and an antenna matched to 40  between pins TX1 and TX2 at 13.56 MHz.
Pin characteristics AUX 1, AUX 2
V
o
output voltage 0 - 1.8 V
C
L
load capacitance - - 400 pF
Pin characteristics RXP, RXN
V
i
input voltage 0 - 1.8 V
C
i
input capacitance 2 3.5 5 pF
V
mod(pp)
modulation voltage V
mod(pp)
=V
i(pp)(max)
 V
i(pp)
(min)
-2.5- mV
V
pp
signal on RXP, RXN - - 1.65 V
Pins TX1 and TX2
V
o
output voltage V
ss(TVSS)
-V
DD(TVDD)
V
R
o
output resistance - 1.5 - 
Current consumption
I
pd
power-down current ambient temp = 25°C - 8 40 nA
ambient temp = 85°C - 200 400 nA
I
stby
standby current ambient temp = 25°C
[1]
-36 A
I
LPCD
LPCD sleep current
[1]
-36 A
I
DD
supply current - 17 20 mA
modem off; transceiver off - 0.45 0.5 mA
I
DD(PVDD)
PVDD supply current no load on digital pin
[2]
--10 A
I
DD(TVDD)
TVDD supply current
[3][4][5]
- 100 200 mA
Clock frequency Pin CLKOUT
f
clk
clock frequency configured to 27.12 MHz - 27.12 - MHz

clk
clock duty cycle - 50 - %
Crystal oscillator
V
o(p-p)
peak-to-peak output
voltage
pin XTAL1 - 1 - V
V
i
input voltage pin XTAL1 0 - 1.8 V
C
i
input capacitance pin XTAL1 - 3 - pF
Typical input requirements
f
xtal
crystal frequency - 27.12 - MHz
ESR equivalent series
resistance
-50100
C
L
load capacitance - 10 - pF
P
xtal
crystal power dissipation - 50 100 W
Table 194. Characteristics
…continued
Symbol Parameter Conditions Min Typ Max Unit