Specifications

ATAPI For Streaming Tape QIC-157 Rev B

2. The Host writes the Packet Command code (A0h) to the Command Register.

3. The Device sets BSY and prepares for Command Packet transfer.

4. When the Device is ready to accept the Command Packet, the Device sets CoD and clears IO,

BSY prior to asserting DRQ. Some Devices will assert INTRQ following the assertion of DRQ.

See section 4.1.7.1 General Configuration Word (0), on page 25 for command packet DRQ

types and other related timing information.

5. After detecting DRQ, the Host writes the 12 bytes (6 words) of Command to the Data Register.

6. The Device (1) clears DRQ (when the 12

byte is written), (2) sets BSY, (3) reads Features and

Byte Count requested by the Host system, (4) prepares for data transfer.

7. When ready to transfer data, the Device transfers via DMARQ/DMACK any amount that the

Device can accommodate or has in its buffers at this time. This continues until all the data has

been transferred.

8. When the Device is ready to present the status, the Device places the completion status into the

Status Register, and sets IO, CoD, DRDY and clears BSY, DRQ, prior to asserting INTRQ.

After detecting INTRQ, the Host reads the Status Register for the command Completion Status.

2.10. Flow of Non-data Commands

This class includes commands such as Rewind, etc. Execution of these commands involves no data

transfer.

1. The Host Polls for BSY=0, DRQ=0 then initializes the task file by writing the required

parameters to the Features, Byte Count, and Drive/Head registers.