Installation guide

Windows NT Installation Guide 43
The following table lists and describes the post codes for the EB66.
Table 13 Post Codes for EB66
Post Code (hex) Description
00 ISA bus reset
01 CPU speed detected
02 CPU speed converted
04 Memory global timing register written
05 Read system configuration data
06 Preconfigure memory banks
07 DRAMs awakened
08 Bcache timing established
09 Bcache flushed (good tag parity written)
0A Bank 0 timing register written
0B Bank 1 timing register written
0C Bank configuration registers written
0D Bank base addresses established
0F ABOX_CTL register written
10 All of memory rewritten (good data parity written)
14 Memory errors cleared; start reading system ROM
15 Loading ROM (header located)
16 Loading ROM (image located)
17 System ROM loaded to memory
18 Icache flush code written to memory
19 CPU errors cleared