Specifications

 2012 Advanced Micro Devices, Inc.
Introduction
AMD SP5100 Register Programming Requirements
Page 8
1.2 AMD SP5100 Block Diagram
This section contains a block diagram for the SP5100. Figure 1 below shows the SP5100 internal
PCI devices and major functional blocks.
GPP_P/N (3:0)
LPC
LPC /FWH/SPI Rom interface
PCI Bridge
SMBUS /ACPI
AB
HD Audio
PORT 1 PORT 0
USB:OHCI(x5)
USB:EHCI(x2)
8250 TIMER
GPIO
RTC
ACPI / HW
Monitor
SMBUS
BUS Controler
APIC/ PIC
INTERRUPT
controller
SMI
SIRQ
PM
SPEAKER
GEVENT[7:0],SLPBUTTON
GPM [9:0]TEMPDEAD,
TEMPCAUT,
SHUTDOWN,DC_STOP#
SCIOUT,
SOFF#
INT# H:A
LDTRST#
RESET#
PWRGOOD
A-LINK
B-LINK
PICD[0]
RTC_IRQ#,
PIDE_INTRQ,
USB_IRQ#,
SATA_IRQ#,
AZ_IRQ#
X1/X2
12 USB2.0 + 2
USB1.1 PORTS
SERIRQ#
6 PCI SLOTS
LPC bus
SPI bus
Debug port
B-LINK A-LINK
Alink Express II
IMC
8051
IMC_INT
Clock Gen
CPU_NB_HT
NB Disp Clock
USB Clock
SIO Clock
SATA Clock
USB clock
Flash Cont Clock
CPU_HT_HT
PCIE_GFX_Clock
25MHz X1 / X2
Flash
Controller
SATA
Controller
6 PORTS(
GEN-II
)
IDE
1 CHANNEL
FC interface
IDE interface
HD Link
ASF
SMBUS
(Not Supported)
Figure 1 SP5100 Internal PCI Devices and Major Functional Blocks