Specifications

 2012 Advanced Micro Devices, Inc.
Appendix A: Sample Codes for BIOS Workarounds
AMD SP5100 Register Programming Requirements
Page 68
or al, 02h
out dx, eax
mov eax, 080009210h
mov dx, 0CF8h
out dx, eax
mov dx, 0CFCh
in eax, dx
mov edi, eax
add edi, 0BCh
mov eax, es:[edi] ;es should be set to 0, and the segment limit should be set 0 to 4GB
and ax, 0EFFFh ;clear BIT12
mov es:[edi], eax
EHCI1_BAR_NOT_SET:
;For EHCI controller 2 (Bus 0 Dev 0x13 Fun 2)
;read BAR address
mov eax, 080009A10h
mov dx, 0CF8h
out dx, eax
mov dx, 0CFCh
in eax, dx
cmp eax, 0
je EHCI2_BAR_NOT_SET
cmp eax, -1
je EHCI2_BAR_NOT_SET
;enable memory access
mov eax, 080009A04h
mov dx, 0CF8h
out dx, eax
mov dx, 0CFCh
in eax, dx
or al, 02h
out dx, eax