Specifications

 2012 Advanced Micro Devices, Inc.
Appendix A: Sample Codes for BIOS Workarounds
AMD SP5100 Register Programming Requirements
Page 67
Appendix A: Sample Codes for BIOS Workarounds
A1. Sample Code for SP5100 Erratum #11: “Enabling EHCI Dynamic Clock
Gating May Cause Bug Code 0xFE System Error”.
(Refer to section 6.17 “EHCI Dynamic Clock Gating Feature”)
Note: This code is found in the SP5100 BIOS because SP5100 shares the same CIMx as the
SB7xx. It has no relevance for the SP5100 but is included in case it shows up in a software
debugging process.
The programming of the registers in this workaround needs to be done only during S5/S4 to S0
transitions. On resume from S3, these registers are not required to be re-programmed.
;Description:
; This sample code disables ECHI dynamic clock gating feature by clearing bit 12
; in the EHCI BAR (MMIO) Register Offset 0xBC.
;Requirement:
; 1. USB BARs must be programmed before executing this piece of code
; 2. es segment register should be set to base 0 and limit set to 4GB
pushad
;For EHCI controller 1 (Bus 0 Dev 0x12 Fun 2)
;read BAR address
mov eax, 080009210h
mov dx, 0CF8h
out dx, eax
mov dx, 0CFCh
in eax, dx
cmp eax, 0
je EHCI1_BAR_NOT_SET
cmp eax, -1
je EHCI1_BAR_NOT_SET
;enable memory access
mov eax, 080009204h
mov dx, 0CF8h
out dx, eax
mov dx, 0CFCh
in eax, dx