Specifications

 2012 Advanced Micro Devices, Inc.
TOC
AMD SP5100 Register Programming Requirements
Page 6
7.9 Internal and External SATA Ports Indication Registers.............................................................. 60
7.10 Aggressive Link Power Management ......................................................................................... 60
7.11 SATA MSI and D3 Power State Capability ................................................................................ 61
7.11.1 SATA MSI Settings ............................................................................................................................. 61
7.11.2 D3 Power State Settings ...................................................................................................................... 61
7.11.3 Capability Pointer Settings .................................................................................................................. 62
7.12 Disabling CCC (Command Completion Coalescing) Support .................................................... 62
8 LPC (bus-0, dev-20, fun-03) .................................................................................. 63
8.1 Enabling/Disabling LPC Controller ............................................................................................ 63
8.2 Parallel Port ECP Mode Support ................................................................................................. 63
9 IDE Controller (bus-0, dev-20, fun-01) .............................................................. 64
9.1 Disable Second IDE MSI Capability ........................................................................................... 64
9.2 Enable IDE Data Bus DD7 Pull-Down Resistor ......................................................................... 64
10 HD Audio (bus-0, dev-20, fun-02) ........................................................................ 65
10.1 Enabling/Disabling HD Audio .................................................................................................... 65
10.2 HD Audio Interrupt Routing Table ............................................................................................. 65
10.3 Audio Port Configuration............................................................................................................. 65
Appendix A: Sample Codes for BIOS Workarounds ........................................... 67
A1. Sample Code for SP5100 Erratum #11: “Enabling EHCI Dynamic Clock Gating May
Cause Bug Code 0xFE System Error”. .......................................................................................... 67
A2. Sample Code for SP5100 Erratum #23: “USB Wake on Connect/Disconnect with Low
Speed Devices”. ................................................................................................................................ 70
Appendix B: Revision History ................................................................................... 72