Specifications

 2012 Advanced Micro Devices, Inc.
SATA: dev-17, func-0
AMD SP5100 Register Programming Requirements
Page 56
7.5 SATA Subclass Programming Sequence
The SATA controller supports the following modes:
• IDE mode
• AHCI mode
• Raid mode
The SBIOS programs the subclass code and the interface register to enable the SATA controller to
be represented as the IDE controller, the AHCI controller, or the Raid controller.
ASIC Rev Register Settings Function/Comment
All Revs SP5100 1. SATA_PCI_config 0x40 [0] = 1 Enables the subclass code register (PCI config register
0Ah) and the program interface register (PCI config
register 09h) to be programmable.
2. Program SATA Controller mode in
a) IDE mode, or
SATA_PCI_config 0x09 = 0x8f (default)
SATA_PCI_config 0x0A = 0x01
b) AHCI mode, or
SATA_PCI_config 0x09 = 0x01
SATA_PCI_config 0x0A = 0x06
c) RAID mode
SATA_PCI_config 0x09 = 0x00
SATA_PCI_config 0x0A = 0x04
The SBIOS is required to program the subclass code
register of the SATA controller to be represented as the
IDE, AHCI, or the RAID controller.
3. SATA_PCI_config 0x40 [0]= 0 Clears the bit to convert the subclass code register to be a
read-only register.
The SBIOS is required to complete this step to ensure that
the subclass code register be read-only (in order to be PCI
compliant).
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details refer to
the sections check-marked
in the SP5100 Register
Reference Guide
X
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC