Specifications
2012 Advanced Micro Devices, Inc.
SATA: dev-17, func-0
AMD SP5100 Register Programming Requirements
Page 54
SP5100 A14 and
above
SATA_PCI_config 0x48 [13:7] = 7’h7F
SATA_PCI_config 0x48 [14] = 0 (
default)
SATA_PCI_config 0x48 [15] = 1
The setting to these register bits should
be restored to 1 for A14
1. On resume from S3 and S4.
2. After warm boot reset.
The registers listed here apply only to revision A14 and
above. These bits enable enhancements made in the A14
and above to address compatibility or minor spec violation
issues seen in simulation. The SATA test/enhancement
mode should be enabled by programming these registers to
1s. The default power-up setting for these registers are 0s.
SP5100 A14 and
above
SATA_PCI_config 0x48 [6] = 1 Setting this bit to 1 will allow the Activity LED to go off when
there is no activity and the driver does not send additional
commands due to user intervention of the Vista OS boot
process (by pressing the F8 key). Applies to configuration in
which the ODD is attached to Slave Port in IDE mode.
SP5100 A14 and
above
Smbus_PCI_config 0xAC [13] = 0 The SATA test/enhancement mode should be enabled by
programming this register to 0. The default power-
up setting
for this register is 1. The setting to this register bit should be
restored to 0 for A14 and above.
1. On resume from S3 and S4
2. After warm boot reset
All Revs SP5100
SATA_BAR5 + Port offset + 0x10 =
FFFFh
This setting applies only when BIOS is using IDE to AHCI or
AMD IDE to AHCI modes.
To clear the error status, software needs to write 1 to this
register. For all SATA ports that are going to be visible to the
OS, BIOS should write 1 to bits [31:00] of the corresponding
port register just before passing the control to the OS.
All Revs SP5100 SATA_PCI_config 0x40 [23] = 1
Disable AHCI enhancement.
This feature is not supported. For proper operation, this
feature should be disabled
Note: The system may hang during post if this register is not set correctly.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details, refer to
the sections check-marked
in the SP5100 Register
Reference Guide.
X
X
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC
7.3 Disabling SATA
ASIC Rev Register Settings Function/Comment
All Revs SP5100
Smbus_PCI_config 0xAC [8] = 0 Disables the SATA controller.
This shuts down most clocks in the SATA controller.
Smbus_PCI_config 0xAC [9] = 1 Disables the SATA PHY I2C interface.
This setting is mandatory to prevent un-powered SATA
from corrupting SMbus controller protocol.
Note: Some board designs may choose to disable the SATA controllers to reduce power consumption.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details refer to
the sections check-marked
in the SP5100 Register
Reference Guide
X
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC