Specifications

 2012 Advanced Micro Devices, Inc.
USB – OHCI & EHCI controllers (bus-0, dev-18/19, fun-00 ~02/
bus-0, dev-20, fun-05)
AMD SP5100 Register Programming Requirements
Page 51
6.23 Advance Async Enhancement
ASIC Rev Register Settings Function/Comment
SP5100 A12 EHCI PCI Config 0x50[28] = 1 Advance asynchronous enhancement function.
For normal operation, the AAE function should be disabled
by setting the bit in both EHCI controllers:
Bus-0 Dev-18 Func-2 and Bus-0 Dev-19 Func-2
Enabling this function may cause USB 2.0 device to
malfunction or be undetected.
SP5100 A14 and
above
EHCI_PCI_Config 0x50[3] =1
EHCI PCI Config 0x50[28] = 0
Set this bit 3 to 1
Clear this bit 28
This enhancement on A14 and above
will improve the USB
performance when more than one USB device is
connected.
The bits must be programmed in both of the EHCI host
controllers:
Bus-0 Dev-18 Func-2 and Bus-0 Dev-19 Func-2
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details, refer to
the sections check-marked
in the SP5100 Register
Reference Guide.
X
RTC ACPI PM REG A-LINK I/O REG XIOAPIC
6.24 USB Periodic Cache Setting
ASIC Rev Register Settings Function/Comment
SP5100 A12 EHCI_PCI_Config 0x50[27] =1 Set this bit to 1 on revision A12
Should be done for non Windows OS only.
The bit must be programmed in both of the EHCI host
controllers:
Bus-0 Dev-18 Func-2 and Bus 0 Dev-19 Func-2
SP5100 A14 and
above
EHCI_PCI_Config 0x50[8] =1
EHCI_PCI_Config 0x50[27] =0
Set bit 8 to 1 on revision A14 and above
Clear bit 8 or do not program if untouched after power up.
The bits must be programmed in both of the EHCI host
controllers:
Bus-0, Dev-18 Func-2 and Bus 0 Dev-19 Func-2
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details, refer to
the sections check-marked
in the SP5100 Register
Reference Guide.
X
RTC ACPI PM REG A-LINK I/O REG XIOAPIC