Specifications
2012 Advanced Micro Devices, Inc.
TOC
AMD SP5100 Register Programming Requirements
Page 5
5.10 Enabling Lock Operation ............................................................................................................ 40
5.11 Enabling Additional Optional PCI Clock (PCICLK5) ................................................................ 41
5.12 Enabling One-Prefetch-Channel Mode ....................................................................................... 41
5.13 Disabling PCIB MSI Capability .................................................................................................. 41
5.14 Adjusting CLKRUN# .................................................................................................................. 42
6 USB – OHCI & EHCI controllers (bus-0, dev-18/19, fun-00 ~02/ bus-0, dev-
20, fun-05) ........................................................................................................................ 43
6.1 Enabling/Disabling OHCI and EHCI Controllers ....................................................................... 43
6.2 USB Device Support to Wake Up System from S3/S4 State ...................................................... 44
6.3 USB S4/S5 Wakeup or PHY Power Down Support ................................................................... 44
6.4 USB PHY Auto Calibration Setting ............................................................................................ 44
6.5 USB Reset Sequence ................................................................................................................... 45
6.6 USB Advanced Sleep Control ..................................................................................................... 45
6.7 USB 48 MHz Clock Source Settings .......................................................................................... 45
6.8 Adjusting USB 2.0 Ports Driving Strength ................................................................................. 46
6.9 In and Out Data Packet FIFO Threshold ..................................................................................... 46
6.10 OHCI MSI Function Setting ....................................................................................................... 47
6.11 EHCI Advance Asynchronous Enhancement .............................................................................. 47
6.12 EHCI Advance PHY Power Savings........................................................................................... 47
6.13 Enabling Fix for EHCI Controller Driver Yellow Sign Issue ..................................................... 48
6.14 Enabling Fix to Cover the Corner Case S3 Wake Up Issue ........................................................ 48
6.15 EHCI Async Park Mode .............................................................................................................. 48
6.16 MSI Feature in USB 2.0 Controller............................................................................................. 48
6.17 EHCI Dynamic Clock Gating Feature ......................................................................................... 49
6.18 USB 1.1 ISO OUT Devices/Speaker Noise ................................................................................ 49
6.19 USB Controller DMA Read Delay Tolerant ............................................................................... 49
6.20 Async Park Mode ........................................................................................................................ 50
6.21 Resume Reset Timing ................................................................................................................. 50
6.22 Disable Async QH Cache ............................................................................................................ 50
6.23 Advance Async Enhancement ..................................................................................................... 51
6.24 USB Periodic Cache Setting ....................................................................................................... 51
6.25 USB PID_ERROR_CHECKING ................................................................................................ 52
7 SATA: dev-17, func-0 ............................................................................................. 53
7.1 Enabling SATA ........................................................................................................................... 53
7.2 SATA Initialization ..................................................................................................................... 53
7.3 Disabling SATA .......................................................................................................................... 54
7.4 Disabling Unused SATA Ports ................................
................................................................... 55
7.5 SATA Subclass Programming Sequence .................................................................................... 56
7.6 SATA PHY Programming Sequence .......................................................................................... 57
7.7 SATA Identification Programming Sequence for IDE Mode ..................................................... 58
7.7.1 SATA Drive Detection....................................................................................................................... 58
7.8 Restoring SATA Registers after S3 Resume State ...................................................................... 59