Specifications
2012 Advanced Micro Devices, Inc.
USB – OHCI & EHCI controllers (bus-0, dev-18/19, fun-00 ~02/
bus-0, dev-20, fun-05)
AMD SP5100 Register Programming Requirements
Page 49
6.17 EHCI Dynamic Clock Gating Feature
ASIC Rev Register Settings Function/Comment
All Revs SP5100
EHCI_BAR 0xBC Bit[12] = 0
For normal operation, the clock gating feature must be
disabled. At system reset, this bit is set to “1”. So, BIOS
needs to program this bit to “0”.
EHCI clock gating setting must be programmed in both the
EHCI host controllers.
Bus-0, dev-18 fun 2 and Bus 0 dev-19 fun-2
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details refer to
the sections check-marked
in the SP5100 Register
Reference Guide
X
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC
6.18 USB 1.1 ISO OUT Devices/Speaker Noise
ASIC Rev Register Settings Function/Comment
SP5100 A14 and
above
a. ABCFG 0x90[17] = 1
b. OHCI0 PCI_Config 0x50[25] = 1
Settings a and b are required for revision A14 and above
to
resolve the USB 1.1 speaker noise issue as described in
A12 Errata item #8.
The bits must be programmed in all three OHCI controllers:
Bus-0 Dev-18 Func-0, Bus-0 Dev-19 Func-0, and Bus-0
Dev-20 Func-5.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details, refer to
the sections check-marked
in the SP5100 Register
Reference Guide.
x
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC
X
6.19 USB Controller DMA Read Delay Tolerant
ASIC Rev Register Settings Function/Comment
SP5100 A14 and
above
EHCI_PCI_Config 0x50[7] =0
This bit should not be programmed by software. It should
be left at hardware default setting of ‘0’. Setting this bit to 1
may cause system hang due to long memory read delays
that can occur when the system is in PM states or when
other clients, such as integrated GFX, get higher priority to
memory.
Note: Bit 7 of both EHCI host controllers (Bus-0 Dev-18
Func-2, and Bus-0 Dev-19 Func-2) should be left at ‘0’.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details, refer to
the sections check-marked
in the SP5100 Register
Reference Guide.
X
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC










