Specifications

ManualsBrandsMicrosoft ManualsIP PhoneSP5100/S



2012 Advanced Micro Devices, Inc.

USB – OHCI & EHCI controllers (bus-0, dev-18/19, fun-00 ~02/

bus-0, dev-20, fun-05)

AMD SP5100 Register Programming Requirements

Page 47

6.10 OHCI MSI Function Setting

ASIC Rev Register Settings Function/Comment

All Revs SP5100

OHCI0_PCI_Config 0x40[9:8] = ”11”

OHCI MSI function

For normal operation the MSI function must be disabled by

setting bits [9:8] on dev-18, fun-0, and dev-19, fun-0, OHCI

controllers and bit [8] on dev-20, fun-5, OHCI controller.

bus-0, dev-18 fun 0 / bus-0, dev-19 fun 0

bus-0, dev-20, fun-5.

SATA

USB

SMBUS

PATA

AC97

HD AUDIO

LPC

PCI

For register details refer to

the sections check-marked

in the SP5100 Register

Reference Guide

RTC

ACPI

PM REG

A-LINK

I/O REG

XIOAPIC

6.11 EHCI Advance Asynchronous Enhancement

See section 6.22

6.12 EHCI Advance PHY Power Savings

ASIC Rev Register Settings Function/Comment

SP5100 A11

EHCI_PCI_Config 0x50[31] = 0

Disables Advance PHy power saving for normal operation.

This register bit defaults to ‘0’ on power up. The BIOS

should not program this register bit to 1 in both EHCI

controllers.

Bus-0, dev-18 fun 2 and Bus 0 dev-19 fun-2

SP5100 A12 EHCI_PCI_Config 0x50[31] = 1

Enables Advance PHY power saving feature.

The BIOS should program this register bit to 1 in both

EHCI controllers.