Specifications

 2012 Advanced Micro Devices, Inc.
PCIB (PCI-bridge, bus-0, dev-20, fun-04)
AMD SP5100 Register Programming Requirements
Page 42
5.14 Adjusting CLKRUN#
ASIC REV Register Settings Function/Comment
All Revs SP5100 PCIB_PCI_config 0x64 [15] = 0x1 This bit should be set to 1 for the proper operation of
CLKRUN#.
Note: This setting is mandatory.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details refer to
the sections check-marked
in the SP5100 Register
Reference Guide
X
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC