Specifications

 2012 Advanced Micro Devices, Inc.
A-Link Express Settings - Indirect I/O Access
AMD SP5100 Register Programming Requirements
Page 33
4.6 B-Link Client’s Credit Variable Settings for the Downstream
Arbitration Equation
ASIC Rev Register Settings Function/Comment
All Revs SP5100 ABCFG 0x9C [0] = 1 Disables the credit variable in the downstream arbitration
equation.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details refer to
the sections check-marked
in the SP5100 Register
Reference Guide
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC
X
4.7 Enabling Additional Address Bits Checking in Downstream
Register Programming
ASIC Rev Register Settings Function/Comment
All Revs SP5100 ABCFG 0x9C [1] = 1 Register bit to qualify additional address bits into
downstream register programming.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details refer to
the sections check-marked
in the SP5100 Register
Reference Guide
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC
X
4.8 Set B-Link Prefetch Mode
ASIC Rev Register Settings Function/Comment
All Revs SP5100 ABCFG 0x80 [17] = 1
ABCFG 0x80 [18] = 1
Sets B-Link prefetch mode.
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details refer to
the sections check-marked
in the SP5100 Register
Reference Guide
RTC
ACPI
PM REG
A-LINK
I/O REG
XIOAPIC
X