Specifications

 2012 Advanced Micro Devices, Inc.
ACPI/SMBUS Controller (bus-0, dev-20, fun-0)
AMD SP5100 Register Programming Requirements
Page 29
2.43 SMAF Matching Setting
ASIC Rev Register Settings Function/Comment
All Revs SP5100 Smbus_PCI_config 0x60 [22] = 1b This bit is required to be set to cover a corner case of
concurrent throttling and C1e
SATA
USB
SMBUS
PATA
AC97
HD AUDIO
LPC
PCI
For register details, refer to
the sections check-marked
in the SP5100 Register
Reference Guide.
x
RTC
ACPI
PM_REG
A-LINK
I/O REG
XIOAPIC