Specifications

VHDL Datapath Synthesis
VHDL Reference Manual 5-9
Instantiation Details
If you are planning to do direct instantiation of the Synario Generic
Datapth macrofunctions, you will need to add the following library/use
statements to your source code:
library gen_dp;
use gen_dp.components.all;
The source code for this package can be found in
<SYNARIO>\lib5\gen_dp.vhd, where <SYNARIO> refers to your
Synario installation directory. This package contains the component
declarations for all supported macrofunctions, and should be consulted
when doing direct instantiation.
Functional Description
The following tables describe the functional behavior of the datapath
macrofunctions.
G_ADD_SUB
The following table describes the ports of the G_ADD_SUB:
Port Usage Default
Value
Description Comments
Dataa Required None First data input Size equals WIDTH generic.
Datab Required None Second data input Size equals WIDTH generic.
Add_sub Optional Logic 1 Controls whether add or sub
function is performed.
Defaults to add.
Cin Optional Logic 0 Carry in, active high.
Sum Optional None Sum output. Sum = Dataa +/- Datab +/- Cin
Cout Optional None Carry out output. Indicates overflow for unsigned
arithmetic.
Overflow Optional None Overflow output Has no meaning for UNSIGNED
arithmetic.
G_ADD_SUB also has the following generics:
Generic Usage Description Comments
Width Required The width, in bits, of the Dataa,
Datab, and Sum ports.
Must be an integer value >= 2.
Representation Required Indicates whether UNSIGNED or
SIGNED math is to be
performed.
Only the value UNSIGNED is
currently supported.
An example of an instantiated G_ADD_SUB is: