Specifications

VHDL Datapath Synthesis
5-4 VHDL Reference Manual
If this happens because of an inferred macrofunction, turn LPM
inferencing off. If it happens because of an instantiated macrofunction,
either replace that macrofunction, or consider using it in a different
manner. For example, in this case using a synchronous reset will map
to an Orca device.
In all cases be sure to consult the Device Kit manual for your target
device, it will contain details on any limitations that apply to that
device.
Examples of How to Infer Datapath Macrofunctions
This section will discuss the particulars of how to write code to infer
the use of different datapath macrofunctions.
ADD_SUB
The following are examples of code that will infer an ADD_SUB:
c <= a + b;
p0: process (d, e)
begin
f <= d+e;
end process;
p1: process(clk)
begin
if (rising_edge(clk)) then
i <= g - h;
end if;
end process;
The first two cases, a simple signal assignment statement and a
combinational process, are equivalent. Process p1 will infer an
ADD_SUB, configured to do subtraction and with the output registered.
There is currently no way to infer use of the Add_Sub or Cin ports of
an ADD_SUB. Therefore, the following examples will each infer two
ADD_SUBs:
l <= j + k + my_carry_bit;
p2: process(my_control, m, n)
begin
if (my_control = '1') then
o <= m + n;
else
o <= m - n;
end if;
end process;
For these cases, direct instantiation of the G_ADD_SUB macrofunction
from the Synario Generic Datapath library is the solution, see the
section on instantiation.