Specifications

Language Structure
2-12 VHDL Reference Manual
Numeric Types
The numeric types consist of integer, floating point (real), and
physical types. Two encoding schemes are used by the VHDL
Synthesizer for numeric types:
• Numeric types and subtypes that contain a negative number in
their range definition are encoded as two's complement numbers.
• Numeric types and subtypes that contain only positive numbers are
encoded as binary numbers.
The number of wires that are synthesized depends only on the value in
the definition that has the largest magnitude. The smallest magnitude
is assumed to be zero for numeric types.
Also for synthesis: floating point numbers are constrained to have the
same set of possible values as integers, although they can be
represented using floating point format with a positive exponent.
Numeric types and subtypes are synthesized as follows:
The declaration: Is synthesized as:
type int0 is range 0 to 100
-- 7 bit binary encoding
type int1 is range 10 to 100 -- 7 bit binary encoding
type int2 is range -1 to 100 -- 8 bit two's complement
type int3 is int2 range 0 to 7 -- 3 bit binary encoding
Numeric Operators
If the type of the object to which the result is assigned has more bits
than either of the operands, then the result of the numeric operation is
automatically sign or zero extended by the VHDL synthesizer.
Sequential encoded types are zero extended, and two's complement
numbers are sign extended.
If the type of the object to which the result is assigned has fewer bits
than either of the operands, then the result of the numeric operation is
truncated. If a numeric operation has a result that is larger than either
of the operands then the new size is evaluated before the above rules
are applied. For example, if an addition operator "+" generates a carry,
the result will be truncated, used, or sign (or zero) extended according
to the type of the object to which the result is assigned:
type short is integer 0 to 255;
subtype shorter is short range 0 to 31;
subtype shortest is short range 0 to 15;
signal op1,op2,res1: shortest;
signal res2: shorter;
signal res3: short
begin
res1 <= op1 + op2; -- truncate carry
res2 <= op1 + op2; -- use carry
res3 <= op1 + op2; -- use carry and zero extend
Note: During simulation, if the result of an arithmetic operation than
the size of the specified object, as is the case for signal res1, then the
simulator will produce an error.