Specifications

VHDL Reference Manual Index-1
Index
A
abs..................................................................................................... 2-17, 3-6
Addition operators.........................................................................................3-7
and.......................................................................................................... 2-16
Architecture........................................................................................... 2-2, 2-5
Arithmetic operators ............................................................................. 2-17, 3-6
Arrays................................................................................................. 2-13, B-2
and top-level schematic ............................................................................ 6-10
Assigning pin numbers...................................................................................C-2
Asynchronous preset and reset ..................................................................... 3-22
Attribute
critical..................................................................................................... 4-17
enum_encoding........................................................................................ 4-18
macrocell ................................................................................................ 4-16
property .................................................................................................. 4-15
Attribute statement
pinnum .....................................................................................................C-3
Attributes
device fitting............................................................................................ 4-13
high........................................................................................................ 2-18
low ......................................................................................................... 2-18
predefined ............................................................................................... 2-18
synthesis................................................................................................. 4-13
B
Behavioral model ..........................................................................................C-9
Biderectional ports ........................................................................................4-9
Bidirectional I/O................................................................................... 4-8, C-12
Binary encoding ................................................................................... 2-13, 4-2
Bit.................................................................................... 2-11, 2-13, 2-16, 3-3
bit vector ............................................................................................ 2-11, C-3
Boolean ............................................................................ 2-11, 2-13, 2-16, 3-3
Busses
on top-level schematic .............................................................................. 6-10
C
Case sensitivity......................................................................................2-9, C-2
Case statement.................................................................................... 3-8, 3-10
Character .......................................................................................... 2-11, 2-13