Specifications

Language Structure
VHDL Reference Manual 2-3
Library Units
Library units (also known as design units) are the main components of
a VHDL description. They consist of the following kinds of declarations:
• Package (optional)
• Entity
• Architecture
• Configuration (optional)
A design may include any number of package, entity, architecture, and
configuration declarations. The relationship of the four types of design
units is illustrated in Figure 2-2. Note that only the entity and
architecture design units are required; the package and configuration
design units are optional.
Figure 2-2: Relationship of VHDL design units
Package
A package is an optional library unit used for making shared
definitions. An example of something that might be shared is a type
definition, as shown in Figure 2-1. When you make definitions in a
package, you must use the library and use statements to make the
package available to other parts of the VHDL design.
package example_arithmetic is
type small_int is range 0 to 7;
end example_arithmetic;