User Guide

VSC8584 Evaluation Board
VPPD-03500 VSC8584 User Guide Revision 1.0 4
3.1.5 External 1588 Clock Option
The user may choose to provide an external 1588 REFCLK via SMA connections to J65 and J66. Zero ohm
jumpers may need to be removed and or installed to connect via these clock inputs. The board is built
with connections for external 1588 REFCLK, unless otherwise indicated in documentation accompanying
the specific board delivered.
3.1.6 External RefClk Option
The user may choose to provide an external PHY REFCLK via SMA connections to J21 and J23. Zero ohm
jumpers may need to be removed and or installed to connect via these clock inputs. As per section 2.1.4,
and unless otherwise indicated in documentation accompanying the specific board, the board is built
with a REFCLK connection driven by the ZL30343, instead of using an external REFCLK source.
3.1.7 1588 Daisy-Chain SPI Time-Stamping Connection
The VSC8584 device enables daisy-chaining multiple devices to reduce the number of pins required to
transmit time stamping information to system ASICs gathering IEEE 1588 time stamps. For users with
two or more 8584EV boards, the following single-ended connections shown below are required from
the master device to slave device:
J75 pin 6 to J77 pin 6 (1588_SPI_CLK output → input)
J75 pin 4 to J77 pin 4 (1588_SPI_CS ouput → input)
J75 pin 2 to J77 pin 2 (1588_SPI_MISO output → 1588_SPI_MOSI input)
See section 3.5.4 for register programming to enable this interface.
Recommendation: for SPI daisy chaining use a Molex 10 pin ribbon cable with one-to-one connections
Figure 3 • 1588 Daisy-Chain SPI Interconnect
Once enabled along with proper initialization of the 1588 IP block, time-stamped 1588 traffic in the
egress direction will generate a similar sequence on the serialized timestamp daisy-chain as shown in
the following illustration. See the VSC8584 datasheet section about Serial Time Stamp Output Internface
for a more detailed functional description.