User Guide

6
Enable Interrupts
The FDDR is capable of raising interrupts when certain predefined conditions are satisfied. Check
Enable Interrupts in the FDDR configurator if you would like to use these interrupts in your application.
This exposes the interrupt signals on the FDDR instance. You can connect these interrupt signals as
your design requires. The following Interrupt signals and their preconditions are available:
FIC_INT - Generated when there is an error in the transaction between the Master and the FDDR
IO_CAL_INT - Enables you to recalibrate DDR I/O's by writing to DDR controller registers via the
APB configuration interface. When calibration is complete, this interrupt is raised. For details
about I/O recalibration, refer to the Microsemi
SmartFusion2 Users Guide.
PLL_LOCK_INT - Indicates that the FDDR FPLL has locked
PLL_LOCKLOST_INT - Indicates that the FDDR FPLL has lost lock
FDDR_ECC_INT - Indicates a single or two-bit error has been detected
Fabric Clock Frequency
Clock frequency calculation based on your current Clock frequency and CLOCK divisor, displayed in
MHz.
Fabric Clock Frequency (in MHz) = Clock Frequency / CLOCK divisor
Memory Bandwidth
Memory bandwidth calculation based on your current Clock Frequency value in Mbps.
Memory Bandwidth (in Mbps) = 2 * Clock Frequency
Total Bandwidth
Total bandwidth calculation based on your current Clock Frequency, Data Width and CLOCK divisor, in
Mbps.
Total Bandwidth (in Mbps) = (2 * Clock Frequency * Data Width) / CLOCK Divisor