User Guide
Table Of Contents
15
AXI Bus Interface
Table 3-5 • AXI Bus Interface
Port Name Direction Description
AXI_S_AWREADY OUT Write address ready
AXI_S_WREADY OUT Write address ready
AXI_S_BID[3:0] OUT Response ID
AXI_S_BRESP[1:0] OUT Write response
AXI_S_BVALID OUT Write response valid
AXI_S_ARREADY OUT Read address ready
AXI_S_RID[3:0] OUT Read ID Tag
AXI_S_RRESP[1:0] OUT Read Response
AXI_S_RDATA[63:0] OUT Read data
AXI_S_RLAST OUT Read Last - This signal indicates the last transfer in a read burst.
AXI_S_RVALID OUT Read address valid
AXI_S_AWID[3:0] IN Write Address ID
AXI_S_AWADDR[31:0] IN Write address
AXI_S_AWLEN[3:0] IN Burst length
AXI_S_AWSIZE[1:0] IN Burst size
AXI_S_AWBURST[1:0] IN Burst type
AXI_S_AWLOCK[1:0] IN Lock type - This signal provides additional information about the atomic
characteristics of the transfer.
AXI_S_AWVALID IN Write address valid
AXI_S_WID[3:0] IN Write Data ID tag
AXI_S_WDATA[63:0] IN Write data
AXI_S_WSTRB[7:0] IN Write strobes
AXI_S_WLAST IN Write last
AXI_S_WVALID IN Write valid
AXI_S_BREADY IN Write ready
AXI_S_ARID[3:0] IN Read Address ID
AXI_S_ARADDR[31:0] IN Read address
AXI_S_ARLEN[3:0] IN Burst length
AXI_S_ARSIZE[1:0] IN Burst size
AXI_S_ARBURST[1:0] IN Burst type
AXI_S_ARLOCK[1:0] IN Lock Type
AXI_S_ARVALID IN Read address valid
AXI_S_RREADY IN Read address ready