User Guide
6
2 – MSS Configuration Guidelines
Although the MSS configurator allows you to configure all sub-blocks out of order, Microsemi
recommends that you configure the various sub-blocks in a particular order as the configuration of some
sub-blocks depends on others.
Configure the MSS sub-blocks in the following order:
1. External Memory Configuration (MDDR sub-block)
2. Fabric Interface Controller (FIC32_0 and FIC32_1 sub-blocks)
3. MSS digital peripherals in the following order to minimize I/O sharing conflicts:
– Disable all peripherals that are not being used
– Configure USB and Ethernet MAC
– Configure MMUART, I2C, SPI and CAN peripherals
– Configure GPIO’s
4. Clocks (CCC sub-block)
5. Resets (RESET sub-blocks)
6. All other blocks
For example, re-configuring the Fabric Controller Interfaces (FIC32) impacts how the MSS clocks (CCC)
are configured:
• Using the CAN will require that the MSS clock (M3_CLK) be a multiple of 8MHz
• Using the USB requires that the MSS clock (M3_CLK) be greater than 30.1MHz
• Configuring the GPIO’s first may prevent you from using an entire digital peripheral
Refer to the Configuring the MSS Clock Sub-system document for more details about MSS clock
configuration requirements.
For more information on configuring the MSS Sub-blocks, see their documentation.